FPGAs deliver performance and flexibility to mixed-signal applications

FPGAs deliver performance and flexibility to mixed-signal applications

1Jack offers recent examples of how FPGAs have begun meeting the challenges of mixed-signal designs.

Many mission-critical applications in defense and signals intelligence operate in a environment, transforming an input from some part of the spectrum into a digital bit stream and then processing that bit stream into useful information. These applications require a high-performance converter capability, combined with time and frequency domain receiver processing.

For many applications, an A/D converter samples an Intermediate Frequency (IF) to obtain a certain amount of useful data that is centered on a carrier. The digitized real signal derived by the A/D converter via sampling the IF is typically taken to baseband to obtain a complex IQ signal. This process can be accomplished by implementing a Digital Down Converter (DDC) after the A/D function to obtain the baseband signal. In the past, a reconfigurable DDC via a receiver chip, such as the Graychip GC4016, has been used to accomplish baseband conversion. These receiver chips have long been very successful in their role as a DDC. But now increasing clocking speeds, teamed with requirements for greater architecture flexibility, are creating a demand for new technologies that allow the end user more control over tasks such as DDC.

To meet these ever-evolving, high-performance mixed-signal requirements, many board developers and system designers have been auditioning technologies to fill the roles of older devices. Designers are utilizing increasingly powerful to execute certain functions previously performed by devices such as the Graychip and implementing additional types of cores to enhance the product’s feature set. FPGAs, such as the Virtex-4 family from Xilinx, can implement many different types of user-developed firmware cores, including ones capable of performing functions such as DDC or Digital Up Conversion (DUC). Proprietary cores are available that enable the to interface with many other board characteristics; the FPGA performs functions previously performed by ASICs and also implements interfaces such as memory controllers or protocol engines. Cores such as Mercury’s Narrowband DDC EchoCore function very similarly to the aforementioned receiver chips, with a few minor exceptions, providing the user with the necessary performance without the additional packaging. Implementing the DDC in a programmable firmware core within the FPGA puts more flexibility within reach of developers and system designers.

Smaller, more complex

While FPGAs have started to make significant contributions to mixed-signal designs, the overall system requirements for defense and signals intelligence applications have become more challenging. Platforms, especially platforms, are becoming smaller, placing a premium on the ability to deliver performance in a small form factor. (See Figure 1.) At the same time, more platforms are supporting multiple sensors, so that systems must now have the flexibility to deal with different types of input data streams.

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Figure 1: The Global Hawk is a highly effective platform for signal processing payloads. New systems require the same capabilities packaged for much smaller platforms.
(Click graphic to zoom by 1.3x)

The next generation of FPGAs is addressing these challenges. For example, a single Xilinx Virtex-5 FPGA delivers more than twice the processing power of the previous generation in certain packages, with correspondingly greater I/O links. The Virtex-5 series has expanded the availability of its gigabit transceiver links, previously known as MGTs in the Virtex-4 domain, to GTP and GTX links in the Virtex-5 realm. Transceiver links once available only in the FX series are now in the Virtex-5 FXT, LXT, and SXT families as well. This expansion allows board designers to merge customer requirements in smaller form factors, such as XMC, which have real estate limits on the number of FPGAs that can be placed. Now requirements for more logic resources or slices can be met while still providing the high-speed serial links as required by form factors such as XMC. Xilinx has also added additional resources across the Virtex-5 family, making it applicable for multisensor support.

Solving a large bandwidth over a wide spectrum challenge

High-speed applications that require a large amount of bandwidth to be output over a wide spectrum can benefit from FPGA-based architecture in a space-efficient XMC form factor. One example of such a solution is Mercury Computer Systems Echotek Series DCM-V5-XMC Digital Receiver. (See Figure 2.) The module combines high-performance A/D and D/A conversion  with a powerful Xilinx FPGA.

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Figure 2: The Echotek Series DCM-V5-XMC Digital Receiver features the latest in A/D and D/A technology, allowing for high-speed/high-resolution data conversion while still preserving the quality of the original signal. It implements either a Virtex-5 SX95T or FPGA, which can be programmed by the end user for customer-specific application features. The DCM-V5-XMC is well suited for beamforming and direction-finding, as required by many , signals intelligence, electronics intelligence, and communications applications.
(Click graphic to zoom by 1.9x)

The DCM-V5-XMC implements either a Virtex-5 SX95T or LX155T FPGA, which can be programmed by the end user for customer-specific application features. The FPGA is accompanied by both DDR-II-SDRAM and QDR-II-SRAM memory chips. Sufficient memory is available for buffering input data streams and supporting computationally intense applications. Two, single IF channel, Texas Instruments ADS6149 A/D converters have sample rates of up to 250 MSPS at a resolution of 14 bits. Coupled with the high-performance A/D converters and Virtex-5 FPGA, the DCM-V5-XMC also provides a single analog output channel via a Maxim MAX19692 D/A converter rated for 12-bit/2.3 GSPS data conversion.

The board is also populated with both XMC connectors and implements an eight-lane PCIe interface over the primary connector and an Aurora interface over the secondary connector. The SX or LX style FPGA comes with a number of EchoCore firmware resources, including high-speed converter interfaces, DDC and DUC cores, memory controllers, and both PCIe and Aurora protocol interfaces. These flexible resources deliver unique capabilities, such as multiboard coherency, making this new product especially well-suited for beamforming and direction-finding, as required by many radar, signals intelligence, electronics intelligence, and communications applications.

Jack Kilian is a product manager at Mercury Computer Systems, Inc. Prior to this, Jack was promoted to inside sales engineer in December 2006. Jack joined Echotek Corporation as a manufacturing specialist in July 2005. Echotek was then acquired by Mercury in August 2005. Jack earned his BSE in Electrical Engineering from the University of Alabama in Huntsville.

Mercury Computer Systems, Inc./Echotek
info@mc.com
www.mc.com