Message in a bottleneck: Time to double fabric bandwidth with Gen2 Serial RapidIO

Message in a bottleneck: Time to double fabric bandwidth with Gen2 Serial RapidIO

The new Gen2 SRIO switches double bandwidth and support the DoD move to open standards network architecture.

The recent introduction of Gen2 Serial (SRIO) switch chips (Figure 1) from IDT is great news for the COTS embedded defense and aerospace market. The latest generation of SRIO doubles the fabric’s bandwidth to 20 Gbps/full-duplex per 4-lane port for an aggregate nonblocking bandwidth of 240 Gbps. Even greater overall throughput is possible when a cluster of switches is arranged in a 2-level hierarchy on a central switch card. Now that these devices have become available, leading COTS board vendors are designing them into new boards, which are expected to start shipping in Q2 of next year. With the doubling of bandwidth with SRIO Gen2 switches and 100 ns cut through latency, systems that perform Fast Fourier Transforms (FFTs) on large two-dimensional data blocks can be optimized to run on large distributed systems. Most important, because many embedded applications require multiprocessor architectures, RapidIO’s push architecture and messaging feature make it possible for designers to scale up applications simply by adding payload processor cards and remapping software algorithms.

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Figure 1: IDT has introduced the Gen2 Serial RapidIO (SRIO) switch chip.
(Click graphic to zoom by 1.4x)

 

Designers of processors and other -based systems welcome the doubling of SRIO per port bandwidth. Gen2 SRIO offers twice the interconnect performance for about the same industry leading size, weight, and power that adopters have come to enjoy. In applications, one of the limitations to superior performance is fabric bandwidth. These bandwidth-hungry applications have an endless need for increasing amounts of processing performance, so the doubling of fabric interconnect speed is a solid step forward. Also, because SRIO is an open standard, embraced widely in the military embedded market, it helps COTS vendors meet growing customer demand to eschew proprietary, vertical architectures and expand the use of common standards. This trend toward open standards is becoming increasingly important as the DoD’s Modular Open Systems Approach (MOSA) system design philosophy and other industry-wide initiatives encourage vendors and primes to implement open systems. The military understands that systems based on open standards are more flexibly and cost-effectively modified as technologies and missions evolve. Another major tenet of MOSA is “vendor independence.” RapidIO is the most widely supported fabric in MIL/Aero with module and system offerings from a community of vendors including Curtiss-Wright.

A common denominator

In the new world of network-centric platforms, the sensor processor is no longer a black box. Any user connected to the Global Information Grid (GIG) could in principle subscribe to a data feed from an individual processing element contained within an embedded computing system. This vision drives specific requirements into the embedded multicomputer. If data on an embedded system must be made available over the wide-area network, the fabric must be a seamless bridge between the system’s different interfaces, such as sensor output and an Ethernet backbone. The good news is that SRIO works very well as a common denominator among many different interfaces. It is now the embedded fabric of choice in the embedded military sensor market. All of the key embedded elements in the sensor ecosystem currently feature bridges/interconnects that work with SRIO. For example, major vendors of processing elements, including Freescale, Xilinx, and Altera provide integrated SRIO support. For designs that will transition to the Intel architecture, the translation from PCIe to SRIO can be done very simply using a low-power bridge, enabling seamless integration.

The military market has been quick to embrace SRIO as the fabric of choice. Its advantages over Ethernet, for example, are several. On the bandwidth front, Gen2 SRIO at 20 Gbps holds a significant speed advantage over 10 Gigabit Ethernet. And unlike Ethernet, SRIO does not waste CPU cycles on terminating data traffic. With Ethernet, the onboard processor typically runs a User Datagram Protocol (UDP) or Transmission Control Protocol (TCP) stack. The board often includes an additional TCP/IP Offload Engine (TOE) processor to offload the DSP processor. In SRIO on the other hand, no software stack processing occurs to chew up precious CPU cycles. Data is RDMA’ed directly to a remote processor’s local memory. Most importantly RapidIO has the concept of reliable transmission, ensuring every packet is received by the destination with deterministic performance.

Mobile spurs

Another advantage of SRIO is its strength in the commercial market. Originally developed as an embedded fabric/interconnect, SRIO has been adopted in both the medical imaging and the embedded markets. In the embedded switch market, SRIO is very popular, about equal to PCI Express in overall switch revenue. Far from being just a defense and aerospace technology, SRIO dominates the base station market. Texas Instruments, which has a commanding lead as a supplier of the DSP element used in wireless baseband processing, has implemented SRIO in its DSPs. Driven by the economics of the mobile device market, the SRIO road map promises ever-higher levels of bandwidth as mobile device consumers increase their usage and demand for richer applications. As these performance leaps occur, the MIL market will benefit.

Embedded MIL/Aero developers can deploy the new high-speed Gen2 SRIO switches and an Ethernet switch on the same board to achieve / network control and data planes on a single card (Figure 2). This rugged 6U OpenVPX-compliant board combines Ethernet and SRIO switching in a single slot for management, control, and dataplane switching in high-performance embedded military systems. It supports both Gen1 SRIO (1.25, 2.5, 3.125 Gbaud) and Gen2 SRIO (5.0, 6.25 Gbaud) in single- and dual-star backplane topologies.

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Figure 2: An example of a new central switch board designed to take advantage of the new Gen2 SRIO switch chips is Curtiss-Wright Controls Embedded Computing’s VPX6-6902 Serial RapidIO (SRIO) switch card.
(Click graphic to zoom by 1.9x)

 

The near exponential increase in productivity that we are seeing in evolving sensor designs and implementations is fueling a ceaseless hunger for increased bandwidth, for more processing, more fabric, more CPUs, and more . At the same time, the DoD wants increased use of common standards. SRIO, its road map driven by the very large mobile device market and by consumer bandwidth consumption, opens for system architects the opportunity to specify a high-performance, highly efficient fabric that promises to improve at a rapid pace. Gen2 SRIO switch chips will enable embedded sensor processing systems to keep pace with the flood of raw data generated by sensors.

Robert Hoyecki is Vice President of Advanced Multi-Computing at Curtiss-Wright Controls Embedded Computing. Rob has 15 years of experience in embedded computing with a focus on signal process products. He has held numerous leadership positions such as application engineering manager and product marketing manager. Rob earned a Bachelor of Science degree in Electrical Engineering Technology from Rochester Institute of Technology.

Rob can be reached at info@cwcembedded.com.