Digital signal processors (DSPs) are frequently sed in applications that require high performance, leading to higher clock speeds. Any processor that runs quickly and integrates millions of transistors is a candidate for aggressive design initiatives to keep power consumption at a minimum.
Over the past decade, architectural innovations and power-saving strategies have pushed DSP processing power to increase in millions of instructions per second (MIPS) and other performance metrics at a dizzying pace. Consequently, the battery life of DSP-based systems such as cell phones and ultra-portable music players has steadily risen in large part because of these higher performance DSPs. While DSPs have made great strides, microcontroller (MCU)-based systems have also been under pressure to reduce power. Compared to DSPs, MCUs have some inherent advantages in lowering power dissipation, such as fewer transistors, lower clock rates and often lower operating voltages. The standby current for a modern, power-optimized MCU is measured in nanoamperes compared to microamperes for DSPs. While DSPs deliver far greater performance than MCUs, they have also been aggressively power-optimized but there is a limit to what chip designers can do.